Author:
Jung Do-Hyun,Sharma Ashutosh,Kim Keong-Heum,Choo Yong-Chul,Jung Jae-Pil
Publisher
Springer Science and Business Media LLC
Subject
Mechanical Engineering,Mechanics of Materials,General Materials Science
Reference28 articles.
1. T.C. Tsai, W.C. Tsao, W. Lin, C.L. Hsu, C.L. Lin, C.M. Hsu, J.F. Lin, C.C. Huang, and J.Y. Wu, CMP Process Development for the Via-Middle 3D TSV Applications at 28 nm Technology Node, Microelectron. Eng., 2012, 92, p 29–33
2. H. Kikuchi, Y. Yamada, A.M. Ali, J. Liang, T. Fukushima, T. Tanaka, and M. Koyangi, Tungsten Through-Silicon Via Technology for Three-Dimensional LSIs, Jpn. J. Appl. Phys., 2008, 47(7), p 2801–2806
3. J. Van Olmen, C. Huyghebaert, J. Coenen, J.V. Aelst, E. Sleeckx, A.V. Ammel, S. Armini, G. Katti, J. Vaes, W. Dehaene, E. Beyne, and Y. Travaly, Integration Challenges of Copper Through Silicon Via (TSV) Metallization for 3D-Stacked IC Integration, Microelectron. Eng., 2011, 88, p 745–748
4. M.H. Roh, S.Y. Park, W.J. Kim, and J.P. Jung, Cu Filing into TSV and Si Dice Stacking for 3 Dimension Packaging, JWJ, 2011, 29(3), p 295–300 (in Korean)
5. G.B. Hamad, S.R. Hasan, O.A. Mohamed, Y. Savaria, Characterizing, Modeling, and Analyzing Soft Error Propagation in Asynchronous and Synchronous Digital Circuits, Microelectron. Reliab., 2014 (in press)
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