Multiple fault detection in two-level multi-output circuits
Author:
Publisher
Springer Science and Business Media LLC
Subject
Electrical and Electronic Engineering
Link
http://link.springer.com/content/pdf/10.1007/BF00137254.pdf
Reference12 articles.
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3. J. Jacob and V.D. Agarwal, ?Functional test generation for sequential circuits,? Proc. 5th International Conf. VLSI Design, Bangalore, India, pp. 17?24, January 1992.
4. I. Kohavi and Z. Kohavi, ?Detection of multiple faults in combinational logic networks,? IEEE Trans. Comput., vol. c-21, pp. 556?568, June 1972.
5. D. Schertz and G. Metze, ?A new representation for faults in combinational digital circuits,? IEEE Trans. Comput., vol. c-21, pp. 858?866, August 1972.
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