A Generic Architecture for On-Chip Packet-Switched Interconnections

Author:

Guerrier Pierre,Greiner Alain

Publisher

Springer Netherlands

Reference13 articles.

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2. Virtual Socket Interface Alliance, On-Chip Bus Attributes and Virtual Component Interface – Draft Specification, v. 2.0.4, http://www.vsia.com , September 1999 (document access may be limited to members only).

3. C. Clos, A Study of Nonblocking Switching Networks, Bell System Technical Journal, vol. 32, no. 2, 406–424, 1953.

4. J. Leijten et al. Stream Communication between Real-Time Tasks in a High-Performance Multiprocessor, Proceedings of the 1998 DATE Conference, Paris, France, March 1998.

5. D. C. Chen, J. M. Rabaey, A Reconfigurable Multiprocessor IC for Rapid Prototyping of Algorithmic-Specific High-Speed DSP Data Paths, IEEE Journal of Solid-State Circuits, vol. 27, no. 12, 1895–1904, December 1992.

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