Asynchronous Circuit Design on an FPGA: MIPS Processor Case Study

Author:

Lee Seung-Joon,Lee Deok-Young,Ko Young-Woong,Lee Jeong-Gun

Publisher

Springer Berlin Heidelberg

Reference13 articles.

1. Semiconductor Industry Association, International Technology Roadmap for Semiconductor (2009), http://www.itrs.net/links/2009ITRS/~Home2009.html

2. Hauck, S., Burns, S., Borriello, G., Ebeling, C.: An FPGA for implementing asynchronous circuits. IEEE Design & Test of Computers 11(3), 60–69 (1994)

3. Lecture Notes in Computer Science;A. Royal,2003

4. LaFrieda, C., Hill, B., Manohar, R.: An Asynchronous FPGA with Two-Phase Enable-Scaled Routing. In: Proc. of IEEE International Symposium on Asynchronous Circuits and Systems (May 2010)

5. Brunvand, E., Michell, M., Smith, K.: A comparison of self-timed design using FPGA, CMOS, and GaAs technologies. In: Proc. of International Conf. Computer Design, pp. 76–80 (October 1992)

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1. Detailed implementation of asynchronous circuits on commercial FPGAs;Analog Integrated Circuits and Signal Processing;2020-02-27

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