Self-Timed SRAM for Energy Harvesting Systems-Reference-Cited by-同舟云学术

Self-Timed SRAM for Energy Harvesting Systems

Published:2011 Issue: Volume: Page:105-115
ISSN:0302-9743
Container-title:Integrated Circuit and System Design. Power and Timing Modeling, Optimization, and Simulation
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Author:

Baz Abdullah,Shang Delong,Xia Fei,Yakovlev Alex

Publisher

Springer Berlin Heidelberg

Link

http://link.springer.com/content/pdf/10.1007/978-3-642-17752-1_11

Reference18 articles.

1. International Technology Roadmap for Semiconductors, http://public.itrs.net/

2. Martin, A.J.: The limitations to delay-insensitivity in asynchronous circuits. In: Dally, W.J. (ed.) Advanced Research in VLSI, pp. 263–278. MIT press, Cambridge (1990)

3. Sylvester, D., Agarwal, K., Shah, S.: Variability in nanometer CMOS: Impact, analysis, and minimization. Integration the VLSI journal (41), 319–339 (2008)

4. Saito, H., Kondratyev, A., Cortadella, J., Lavagno, L., Yakovlev, A.: What is the cost of delay insensitivity? In: Proc. ICCAD 1999, San Jose, CA, pp. 316–323 (November 1999)

5. Nielsen, L.S., Staunstrup, J.: Design and verification of a self-timed RAM. In: Proc. of the IFIP International Conference on VLSI 1995 (1995)

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