Potential Analysis of Double Gate Vertical TFET Using 2-D Modeling for Low Power Application-Reference-Cited by-同舟云学术

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Potential Analysis of Double Gate Vertical TFET Using 2-D Modeling for Low Power Application

Published:2023-06-16 Issue:4 Volume:24 Page:314-322
ISSN:1229-7607
Container-title:Transactions on Electrical and Electronic Materials
language:en
Short-container-title:Trans. Electr. Electron. Mater.

Author:

Kumar Hitesh,Verma Abhishek Kumar,Patle Ashish,Soni Somendra Kumar,Wadhwa Girish

Publisher

Springer Science and Business Media LLC

Subject

Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials

Link

https://link.springer.com/content/pdf/10.1007/s42341-023-00449-5.pdf

Reference25 articles.

1. P. Bergveld, Thirty years of ISFETOLOGY: what happened in the past 30 years and what may happen in the next 30 years. Sens. Actuators B Chem. 88(1), 1–20 (2003). https://doi.org/10.1016/S0925-4005(02)00301-5

2. K. Boucart, A.M. Ionescu, Double-gate tunnel FET with high gate dielectric. IEEE Trans. Electron Devices 54(7), 1725–1733 (2007). https://doi.org/10.1109/.TED.2007.899389

3. T.S. Arun Samuel, N.B. Balamurugan, S. Sibitha, R. Saranya, D. Vanisri, Analytical modeling and simulation of dual material gate tunnel field effect transistors. J. Electr. Eng. Technol. 8(6), 1481–1486 (2013). https://doi.org/10.5370/JEET.2013.8.6.1481

4. G. Wadhwa, B. Raj, Label free detection of biomolecules using charge-plasma-based gate underlap dielectric modulated junctionless TFET. J. Electron. Mater. 47(8), 4883–4893 (2018)

5. K. Boucart, A.M. Ionescu, Double-gate tunnel FET with high-$\kappa $ gate dielectric. IEEE Trans. Electron Devices 54(7), 1725–1733 (2007). https://doi.org/10.1109/TED.2007.899389

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1. Linearity and noise evaluation based analysis of extended source heterojunction double gate tunnel FET;Micro and Nanostructures;2024-10

2. Dopingless Extended Source TFET for Switching and Analog/RF Applications;Transactions on Electrical and Electronic Materials;2024-05-04

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