Advanced HiCTE flip chip packaging of 90-nm Cu/Low-K chips: Underfill, novel terminal pad structures, and processing optimization-Reference-Cited by-同舟云学术

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Advanced HiCTE flip chip packaging of 90-nm Cu/Low-K chips: Underfill, novel terminal pad structures, and processing optimization

Published:2005-07 Issue:7 Volume:34 Page:977-993
ISSN:0361-5235
Container-title:Journal of Electronic Materials
language:en
Short-container-title:Journal of Elec Materi

Author:

Chungpaiboonpatana Surasit,Shi Frank G.

Publisher

Springer Science and Business Media LLC

Subject

Materials Chemistry,Electrical and Electronic Engineering,Condensed Matter Physics,Electronic, Optical and Magnetic Materials

Link

http://link.springer.com/content/pdf/10.1007/s11664-005-0085-6.pdf

Reference24 articles.

1. Semiconductor Industry Association, International Technology Roadmap for Semiconductors (Austin, TX: ITRS 2003), http://public.itrs.net.

2. A. Braun, Semiconductor Int. 5, 52 (2003).

3. S. Cummings, M. Mills, J. Waeterloos, and D. Scheck, IMAPS Proc. Packaging Copper/Low-K Semiconductors 12, 35 (2003).

4. D.T. Price, R.J. Gutman, and S.P. Murarka, Thin Solid Films 308, 523 (1997).

5. R.J. Gutman, T.P. Chow, S. Lakshminarayama, D.T. Price, J.M. Steigerwald, L. You, and S.P. Murarka, Thin Solid Films 270, 472 (1995).

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1. Optimal design configuration for aluminum pillar fabrication towards fine pitch ultrasonic bonding applications;2022 IEEE 9th Electronics System-Integration Technology Conference (ESTC);2022-09-13

2. Effect of Bond Layer Properties to Thermo-Mechanical Stresses in Flip Chip Packaging;MATEC Web of Conferences;2017

3. Advanced Packaging of Optoelectronic Devices;Wiley Encyclopedia of Electrical and Electronics Engineering;2013-01-18

4. Design, assembly and reliability of large die and fine-pitch Cu/low-k flip chip package;Microelectronics Reliability;2010-07

5. Molded underfill technology for low-k flip chip packages;2007 International Microsystems, Packaging, Assembly and Circuits Technology;2007

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