Boundary-Scan Test
Author:
Publisher
Springer US
Link
http://link.springer.com/content/pdf/10.1007/978-1-4615-3132-6.pdf
Cited by 15 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献
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2. Test Planning for Core-based Integrated Circuits under Power Constraints;Journal of Electronic Testing;2017-01-30
3. A Built-in Test Circuit for Electrical Interconnect Testing of Open Defects in Assembled PCBs;IEICE Transactions on Information and Systems;2016
4. Electrical Test Method for Interconnect Open Defects in 3D ICs;Transactions of The Japan Institute of Electronics Packaging;2012
5. Open Lead Detection Method by Sensing the Switching Current of CMOS Gate on Sensing Probe;Journal of Japan Institute of Electronics Packaging;2009
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