Formal Verification of Gate-Level Multiple Side Channel Parameters to Detect Hardware Trojans-Reference-Cited by-同舟云学术

Formal Verification of Gate-Level Multiple Side Channel Parameters to Detect Hardware Trojans

Published:2017 Issue: Volume: Page:75-92
ISSN:1865-0929
Container-title:Communications in Computer and Information Science
language:
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Author:

Abbasi Imran Hafeez,Lodhi Faiq Khalid,Kamboh Awais Mehmood,Hasan Osman

Publisher

Springer International Publishing

Link

http://link.springer.com/content/pdf/10.1007/978-3-319-53946-1_5

Reference33 articles.

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3. Anderson, M.S., North, C., Yiu, K.K.: Towards countering the rise of the silicon Trojan. In: Annual Report. Defence Science and Technology Organisation, DSTO-TR-2220, Australia (2008)

4. Bara, A., Bazargan-Sabet, P., Chevallier, R., Encrenaz, E.: Formal Verification of Timed VHDL Programs. In: Specification & Design Languages, pp. 1–6. IET (2010)

5. Bhasin, S., Regazzoni, F.: A survey on hardware Trojan detection techniques. In: Circuits and Systems, pp. 2021–2024. IEEE (2015)

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