Analyzing the Trade-off Between Different Memory Cores and Controllers
Author:
Publisher
Springer International Publishing
Link
http://link.springer.com/content/pdf/10.1007/978-3-319-22035-2_3
Reference24 articles.
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3. Weis C, Wehn N, Igor L, Benini L (2011) Design space exploration for 3D-stacked DRAMs. In: Design, Automation & Test in Europe Conference & Exhibition (DATE), IEEE, Grenoble, pp 1–6
4. Min S, Nam E (2006) Current trends in flash memory technology. In: Asia and South Pacific Conference on Design Automation (ASPDAC), IEEE, Yokohama
5. Loi L, Benini L (2010) An efficient distributed memory interface for many-core platform with 3D stacked DRAM. In: Proceedings of Design, Automation Test in Europe Conference Exhibition (DATE), Germany, pp 99-104
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