Off-Chip Skew Measurement and Compensation Module (SMCM) Design for Built-Off Test Chip-Reference-Cited by-同舟云学术

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Off-Chip Skew Measurement and Compensation Module (SMCM) Design for Built-Off Test Chip

Published:2011-05-06 Issue:4 Volume:27 Page:429-439
ISSN:0923-8174
Container-title:Journal of Electronic Testing
language:en
Short-container-title:J Electron Test

Author:

Han Kihyuk,Park Joonsung,Lee Jae Wook,Chung Jaeyong,Byun Eonjo,Woo Cheol-Jong,Oh Sejang,Abraham Jacob A.

Publisher

Springer Science and Business Media LLC

Subject

Electrical and Electronic Engineering

Link

http://link.springer.com/content/pdf/10.1007/s10836-011-5213-z.pdf

Reference16 articles.

1. Akbay SS, Halder A, Chatterjee A, Keezer D (2004) Low-cost test of eembedded RF/analog/mixed-signal circuits in SOPs. IEEE Trans Adv Packaging 27(2):352–363

2. Choy CS, Ku MH, Chan CF (1997) A low power-noise output driver with an adaptive characteristic applicable to a wide range of loading conditions. IEEE J Solid-state Circuits 32(6):913–917

3. Chun S, Swaminathan M, Smith LD, Srinivasan J, Jin Z, Iyer MK (2001) Modeling of simultaneous switching noise in high speed systems. IEEE Trans Adv Packaging 24(2):132–142

4. Dudek P, Szczepanski S, Hatfield JV (2000) A high-resolution CMOS time-to-digital converter utilizing a Vernier delay line. IEEE J Solid-state Circuits 35(2):240–247

5. Jansson JP, Manttyniemi A, Kostamovaara J (2006) A CMOS time-to-digital converter with better than 10ps single-shot precision. IEEE J Solid-state Circuits 41(6):1286–1296

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