Author:
Shi Yiwen,Dworak Jennifer
Publisher
Springer Science and Business Media LLC
Subject
Electrical and Electronic Engineering
Reference35 articles.
1. Biswas A, Racunas P, Cheveresan R, Emer J, Mukherjee SS, Rangan R (2005) Computing architectural vulnerability factors for address-based structures. Proc. 32nd international symposium on computer architecture, 4–8 June 2005, pp 532–543
2. Breuer MA (2004) Intelligible test techniques to support error tolerance. 13th Asian test symposium, 2004, pp 386–393
3. Breuer MA, Gupta S, Mak TM (2004) Defect and error tolerance in the presence of massive numbers of defects. IEEE design and test of computers, May–Jun 2004, pp 216–227
4. Butler KM, Mercer MR (1991) Quantifying: Non-target defect detection by target fault test sets. In: Europe test symposium, 1991
5. Chong IS, Ortega A (2005) Hardware testing for error tolerant multimedia compression based on linear transforms. 20th IEEE international symposium on defect and fault tolerance in VLSI systems, 3–5 Oct 2005, pp 523–531
Cited by
1 articles.
订阅此论文施引文献
订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献