Identification and Rejuvenation of NBTI-Critical Logic Paths in Nanoscale Circuits-Reference-Cited by-同舟云学术

Identification and Rejuvenation of NBTI-Critical Logic Paths in Nanoscale Circuits

Published:2016-05-12 Issue:3 Volume:32 Page:273-289
ISSN:0923-8174
Container-title:Journal of Electronic Testing
language:en
Short-container-title:J Electron Test

Author:

Jenihhin Maksim,Squillero Giovanni,Copetti Thiago Santos,Tihhomirov Valentin,Kostin Sergei,Gaudesi Marco,Vargas Fabian,Raik Jaan,Sonza Reorda Matteo,Bolzani Poehls Leticia,Ubar Raimund,Medeiros Guilherme Cardoso

Funder

FP7 STREP BASTION

Publisher

Springer Science and Business Media LLC

Subject

Electrical and Electronic Engineering

Link

http://link.springer.com/content/pdf/10.1007/s10836-016-5589-x.pdf

Reference44 articles.

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2. Abella J, Vera X et al (2007) Penelope: the NBTI-aware processor. Proc. 40th Annual IEEE/ACM International Symposium on Microarchitecture, pp. 85–96

3. Ahmed F, Milor L (2010) Reliable cache design with on-chip monitoring of NBTI degradation in SRAM cells using BIST. Proc. 28th IEEE VLSI Test Symposium, pp. 63–68

4. Alam MA (2005) Reliability- and process-variation aware design of integrated circuits. Microelectron Reliabil 48(8):1114–1122

5. Alam MA, Mahapatra S (2005) A comprehensive model of PMOS NBTI degradation. Microelectron Reliab 45(1):71–81

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