Access Port Protection for Reconfigurable Scan Networks-Reference-Cited by-同舟云学术

Access Port Protection for Reconfigurable Scan Networks

Published:2014-10-18 Issue:6 Volume:30 Page:711-723
ISSN:0923-8174
Container-title:Journal of Electronic Testing
language:en
Short-container-title:J Electron Test

Author:

Baranowski Rafal,Kochte Michael A.,Wunderlich Hans-Joachim

Publisher

Springer Science and Business Media LLC

Subject

Electrical and Electronic Engineering

Link

http://link.springer.com/content/pdf/10.1007/s10836-014-5484-2.pdf

Reference35 articles.

1. Abramovici M (2008) In-system silicon validation and debug. IEEE Design & Test Comput 25(3):216–223

2. Agarwal K (2011) Secure scan design. Us Patent App. 7:966– 535

3. Baranowski R (2014) Reconfigurable scan networks: formal verification, access optimization and protection. University of Stuttgart, PhD thesis. http://elib.uni-stuttgart.de/opus/volltexte/2014/8982

4. Baranowski R, Kochte MA, Wunderlich HJ (2012) Modeling, verification and pattern generation for reconfigurable scan networks. In: Proceedings of IEEE International Test Conference (ITC), paper 8.2

5. Baranowski R, Kochte MA, Wunderlich HJ (2013) Scan pattern retargeting and merging with reduced access time. In: Proceedings of IEEE European Test Symposium (ETS), pp 39–45

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