A Polynomial Transform Method for Hardware Systematic Error Identification and Correction in Semiconductor Multi-Site Testing
Author:
Funder
Semiconductor Research Corporation
Texas Instruments
Publisher
Springer Science and Business Media LLC
Subject
Electrical and Electronic Engineering
Link
https://link.springer.com/content/pdf/10.1007/s10836-022-06039-2.pdf
Reference37 articles.
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4. Boning DS et al (2008) Variation. IEEE Trans Semicond Manuf 21(1):63–71. https://doi.org/10.1109/TSM.2007.913194
5. Bruce I, Farayola PO, Chaganti SK, Obaidi AO, Sheikh A, Ravi S, Chen D (2021) An ordinal optimization-based approach to die distribution estimation for massive multi-site testing validation: a case study. In Proc. IEEE European Test Symposium (ETS) 1–4. https://doi.org/10.1109/ETS50041.2021.9465402
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1. Site-to-Site Variation in Analog Multisite Testing: A Survey on Its Detection and Correction;IEEE Design & Test;2023-10
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