A Built-in-Self-Test Σ-Δ ADC Prototype
Author:
Publisher
Springer Science and Business Media LLC
Subject
Electrical and Electronic Engineering
Link
http://link.springer.com/content/pdf/10.1007/s10836-008-5095-x.pdf
Reference25 articles.
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3. Azais F, Bernard S, Bertrand Y, Renovell M (2001) Implementation of a linear histogram BIST for ADCs. In: Proc design, automation and test in Europe (DATE), Munich, 13–16 March 2001, pp 590–595
4. Bernard S, Comte M, Azais F, Bertrand Y, Renovell M (2004) Efficiency of spectral-based ADC test flows to detect static errors. J Electron Test Theory Appl (JETTA) 20(3):257–267
5. Burns M, Roberts GW (2001) An introduction to mixed-signal IC test and measurement. Oxford University Press, Oxford
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1. Optimized System Level Hardware Realization of Built-in-Self-Test Approach for Sigma-Delta Analog-to-Digital Converter;International Journal of Electrical and Electronics Research;2016-09-30
2. A Reconfiguration Method to Improve the Yield of Bandwidth-Limited Pipelined ADCs;International Journal of Measurement Technologies and Instrumentation Engineering;2012-01
3. An Output Response Analyzer Circuit for ADC Built-in Self-Test;Journal of Electronic Testing;2011-07-08
4. A Fully Integrated Built-In Self-Test $\Sigma{-}\Delta$ ADC Based on the Modified Controlled Sine-Wave Fitting Procedure;IEEE Transactions on Instrumentation and Measurement;2010-09
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