Design and investigation of low-complexity Anurupyena Vedic multiplier for machine learning applications

Author:

Parameswaran Santhosh Kumar,Chinnusamy Gowrishankar

Publisher

Springer Science and Business Media LLC

Subject

Multidisciplinary

Reference9 articles.

1. Moss D J M, Boland D and Leong P H W 2019 A two-speed, Radix-4, serial–parallel multiplier. IEEE Trans. Very Large Scale Integr. (VLSI) Systems 27: 769–777

2. Krizhevsky A, Sutskever I and Hinton G E 2012 ImageNet classification with deep convolutional neural networks. In: Proceedings of the 25th International Conference on Neural Information Processing Systems, pp. 1097–1105

3. Lecun Y, Bottou L, Bengio L and Haffner P 1998 Gradient-based learning applied to document recognition. Proceedings of the IEEE 2278–2324

4. Han S, Pool J, Tran J and Dally D J 2015 Learning both weights and connections for efficient neural networks. In: Proceedings of the. 28th International Conference on Neural Information Processing Systems, pp. 1135–1143

5. Manikandan S K and Palanisamy C 2016 Design of an efficient binary Vedic multiplier for high speed applications using Vedic mathematics with bit reduction techniques. Circuits Syst. 07: 2593–2602

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