Compact/SPICE Modeling

Author:

Grabinski WladekORCID,Tomaszewski DanielORCID

Publisher

Springer International Publishing

Reference105 articles.

1. Aarts, A.C., Tajic, A.: MM20 HVMOS model: A surface-potential-based LDMOS model for circuit simulation. In: POWER/HVMOS Devices Compact Modeling, pp. 65–93. Springer (2010)

2. Amin, R., Jean-Michel, S., Morteza, F., Adrian, I.: Negative capacitance double-gate junctionless FETs: A charge-based modeling investigation of swing, overdrive and short channel effect. IEEE Trans. Electron. Dev. ED, 1–7 (2020)

3. Antognetti, P., Massobrio, G.: Semiconductor Device Modeling with SPICE. McGraw-Hill (1988)

4. Baliga, J.: Modern Power Devices. Wiley, New York, NY (1987)

5. Barron, M.: Low level currents in insulated gate filed effect transistors. Solid State Electron. 15(12), 293–302 (1972)

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