Low Power AES Using 8-Bit and 32-Bit Datapath Optimization for Small Internet-of-Things (IoT)

Author:

Kim Ho Keun,Sunwoo Myung HoonORCID

Publisher

Springer Science and Business Media LLC

Subject

Hardware and Architecture,Modelling and Simulation,Information Systems,Signal Processing,Theoretical Computer Science,Control and Systems Engineering

Cited by 16 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Design and implementation of low power Advanced Encryption Standard cryptocore utilizing dynamic pipelined asynchronous model;Integration;2023-11

2. Area-Efficient Intellectual Property (IP) Design of Advanced Encryption Standard;IEEE Transactions on Circuits and Systems II: Express Briefs;2023-10

3. VLSI Implementation of BCH Encoder with Triple DES Encryption for Baseband Transceiver;Mobile Radio Communications and 5G Networks;2023

4. A Study of AES Software Implementation for IoT Systems;2022 3rd International Conference on Issues and Challenges in Intelligent Computing Techniques (ICICT);2022-11-11

5. A highly efficient FPGA implementation of AES for high throughput IoT applications;Journal of Discrete Mathematical Sciences and Cryptography;2022-10-03

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