Study on Failure Mechanism of PCT Reliability for BT Substrate Based CSP (Chip Scale Package)-Reference-Cited by-同舟云学术

Study on Failure Mechanism of PCT Reliability for BT Substrate Based CSP (Chip Scale Package)

Published:2002-12-01 Issue:4 Volume:124 Page:334-339
ISSN:1043-7398
Container-title:Journal of Electronic Packaging
language:en
Short-container-title:

Author:

Chung C. L.¹,Fan James²,Huang M. L.²,Tsai F. J.²

Affiliation:

1. I-Shou University, Department of Materials Science and Engineering, 1, Section 1, Shiuecheng Rd., Dashu Shiang, Kaohsiung, Taiwan, R.O.C.

2. ChipMOS Technologies Inc. No. 5, Nan-Ko Rd. 7, Science-Based Industrial Park, Tainan, Taiwan, R.O.C.

Abstract

In this paper, the study on failure mechanism of moisture sensitivity reliability is reported. It focuses on the PCT conditions which are 121°C, 2atm, 100RH%, and 168 hr. The general failure mode is delamination on the interface between die attach material and die backside. Interestingly, the delamination exists as a gap of 20∼40 μm. In addition, the paper discusses the relative materials influences — for example, the moisture uptake of mold compound systems and die backside surface property effects. The degradation of the die attach material was analyzed by Dynamic Mechanic Analysis (DMA). The delamination surfaces are analyzed by Scanning Electron Microscope (SEM), and Optical Microscope (OM). Furthermore, Scanning Acoustic Tomograph (SAT) through scanning results reveals that the mold compound formula affects the amount of moisture uptake, which obviously would affect the PCT reliability.

Publisher

ASME International

Subject

Electrical and Electronic Engineering,Computer Science Applications,Mechanics of Materials,Electronic, Optical and Magnetic Materials

Link

http://asmedigitalcollection.asme.org/electronicpackaging/article-pdf/124/4/334/5883342/334_1.pdf

Reference6 articles.

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2. Basavanhally, N. R., Chang, D. D., Craston, B. H., and Seger, S. S., Jr., 1992, “Direct chip interconnect with adhesive-connector films,” Proceedings 42nd IEEE Electronic Components and Technology Conference, pp. 487-491.

3. Basavanhally, N. R., Chang, D. D., Craston, B. H., and Seger, S. S., Jr., 1992, “Direct chip interconnect with adhesive-connector films,” Proceedings 42nd IEEE Electronic Components and Technology Conference, pp. 487-491.

4. Estes, R. H., 1991, “A practical approach to die attach adhesive selection,” Hybrid Circuit Technology, June, pp. 44-47.

5. Lu, Richard , 1999, ChipMOS internal report, RP-2610-98026, May.

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