Modern Trends in Microelectronics Packaging Reliability Testing

Author:

Bender Emmanuel12,Bernstein Joseph B.2ORCID,Boning Duane S.1ORCID

Affiliation:

1. Microsystems Technology Laboratories, Massachusetts Institute of Technology, Cambridge, MA 02142, USA

2. Electrical and Electronics Engineering, Ariel University, Ariel 40700, Israel

Abstract

In this review, recent trends in microelectronics packaging reliability are summarized. We review the technology from early packaging concepts, including wire bond and BGA, to advanced techniques used in HI schemes such as 3D stacking, interposers, fan-out packaging, and more recently developed silicon interconnect fabric integration. This review includes approaches for both design modification studies and packaged device validation. Methods are explored for compatibility in new complex packaging assemblies. Suggestions are proposed for optimizations of the testing practices to account for the challenges anticipated in upcoming HI packaging schemes.

Funder

MISTI MIT Israel Lockheed Martin Seed Fund

Publisher

MDPI AG

Reference119 articles.

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5. Lau, J.H. (2021). Semiconductor Advanced Packaging, Springer Publishers.

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