Process-Factor Optimization of Small-Area Sintered Interconnects for Power Electronics Applications

Author:

Alzoubi Khalid1,Hensel Alexander2,Häußler Felix2,Ottinger Bettina2,Sippel Marcel2,Franke Jörg2

Affiliation:

1. Department of Industrial Engineering, Jordan University of Science and Technology, Irbid 22110, Jordan

2. Institute for Factory Automation and Production Systems, Friedrich Alexander Universität, Nürnberg 90429, Germany

Abstract

AbstractPower electronics is concerned with the use of electronic devices to control and transfer electric power from one form to another. Power electronics can be found in laptop chargers, electric grids, and solar inverters. Die-attach interconnections form a critical part of power electronics devices. Silver sintering has been traditionally used for die-attach interconnections because of its high melting point and ability to form very thin thicknesses. However, the processing time compared with soldering is very long. Sintered layers might contain large voids that affect the mechanical stability of the structure. Stresses caused by mechanical and environmental conditions might cause degradation and possibly early failures. This work focuses on studying the combined effect of process factors on the shear strength of small-area die-attach interconnections in silver sintering. Design of experiments (DoE) tools were used to build an experimental matrix with a 95% confidence level. The results have shown that holding time has a considerable effect on the mechanical stability of the die-attach interconnections. Intermetallic compounds formed in the sintered joints at higher holding times resulted in fewer voids. Furthermore, the treatment level of the holding time highly affects the shear strength under other factors such as temperature and pressure.

Publisher

ASME International

Subject

Electrical and Electronic Engineering,Computer Science Applications,Mechanics of Materials,Electronic, Optical and Magnetic Materials

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