Solder Joint Reliability of Wafer Level Chip Scale Packages (WLCSP): A Time-Temperature-Dependent Creep Analysis-Reference-Cited by-同舟云学术

Solder Joint Reliability of Wafer Level Chip Scale Packages (WLCSP): A Time-Temperature-Dependent Creep Analysis

Published:2000-05-29 Issue:4 Volume:122 Page:311-316
ISSN:1043-7398
Container-title:Journal of Electronic Packaging
language:en
Short-container-title:

Author:

Lau John H.¹,Lee S.-W. Ricky¹,Chang Chris¹

Affiliation:

1. Express Packaging Systems, Inc., 1137 San Antonio Road, Palo Alto, CA 94303

Abstract

A novel and reliable wafer level chip scale package (WLCSP) is investigated in this paper. It consists of a copper conductor layer and two low cost dielectric layers. The bump geometry consists of the eutectic solder, the copper core, and the under bump metallurgy. Nonlinear time-temperature-dependent finite element analyses are performed to determine the shear stress, shear creep strain, shear stress and shear creep strain hysteresis loops, and creep strain energy density of the corner solder joint. The thermal-fatigue life of the corner solder joint is then predicted by the averaged creep strain energy density range per cycle and a linear fatigue crack growth rate theory. The WLCSP solder bumps are also subjected to shear test. Finally, the WLCSP solder joints are subjected to both mechanical shear and thermal cycling tests. [S1043-7398(00)01004-5]

Publisher

ASME International

Subject

Electrical and Electronic Engineering,Computer Science Applications,Mechanics of Materials,Electronic, Optical and Magnetic Materials

Link

http://asmedigitalcollection.asme.org/electronicpackaging/article-pdf/122/4/311/5802030/311_1.pdf

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