Impact of Low Temperatures on Solder Joint Failures-Reference-Cited by-同舟云学术

Impact of Low Temperatures on Solder Joint Failures

Published:2002-05-02 Issue:2 Volume:124 Page:135-137
ISSN:1043-7398
Container-title:Journal of Electronic Packaging
language:en
Short-container-title:

Author:

Mirman Boris¹

Affiliation:

1. Suffolk University, Boston, MA 02420-2211

Abstract

An experiment with solder joints of thin plastic packages, cycled between −10° and 110°C, has demonstrated that the majority of solder joint failures occurred at the low temperatures. In this experiment, the low temperatures caused high peeling stresses in the heel area of solder joints and, as usual, relatively low plastic shear strain (as compared with these strains at high temperatures). This fact suggests that the impact of solder peeling stresses on the solder failure is noticeably higher than is anticipated by applying the commonly used failure criteria.

Publisher

ASME International

Subject

Electrical and Electronic Engineering,Computer Science Applications,Mechanics of Materials,Electronic, Optical and Magnetic Materials

Link

http://asmedigitalcollection.asme.org/electronicpackaging/article-pdf/124/2/135/5882689/135_1.pdf

Reference20 articles.

1. Viswanadham, P., Stennett, M., Emerick, A., and Haggett, R., 1993, “Second Level Assembly and Reliability Aspect of Thin Small Outline Packages,” ASME, Binghamton.

2. Mirman, B., 1995, “Thermal Stresses in Thin Small Outline Packages,” ASME Winter Annual Meeting, EEP-Vol. 12, pp. 107–122.

3. Mirman, B., 1996, “Choice of Models and Failure Indicators for Thermally Loaded Solder Joints,” NEPCON East, pp. 295–311.

4. Mirman, B. , 2000, “Lead-On-Chip versus Chip-On-Lead Packages and Solder Failure Criteria,” ASME J. Electron. Packag. 122, pp. 279–280.

5. Engelmaier, W., 1982, “Effects of Power Cycling on Leadless Chip Carrier Mounting Reliability and Technology,” Proc. of Int. Electronic Packaging Conf., p. 15.

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