Affiliation:
1. The University of Texas at Austin, Austin, TX
2. Palo Alto Research Center, Palo Alto, CA
Abstract
In manufacturing process planning, it is critical to ensure that the part generated from a process plan complies with tolerances specified by designers to meet engineering constraints. Manufacturing errors are stochastic in nature and are introduced at almost every stage of executing a plan, for example due to inaccuracy of tooling, misalignment of location, distortion of clamping etc. Furthermore, these errors accumulate or ‘stack-up’ as the manufacturing process progresses to inevitably produce a part that varies from the designed model. The resultant variation should be within prescribed design tolerances. In this work, we present a novel approach for validating process plans using 3D tolerance stack-up analysis by representing variations of nominal features in terms of extents of their degrees of freedom within design and manufacturing tolerance zones. We will show how the manufacturing error stack-up can be effectively represented by composition and intersection of these transformations. We demonstrate several examples with different tolerance specifications to show the applicability of our approach for process planning.
Publisher
American Society of Mechanical Engineers
Cited by
1 articles.
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