Two-Phase Flow Control of Electronics Cooling With Pseudo-CPUs in Parallel Flow Circuits: Dynamic Modeling and Experimental Evaluation

Author:

Lamaison Nicolas1,Braz Marcinichen Jackson,Richard Thome John2

Affiliation:

1. e-mail:

2. Heat and Mass Transfer Laboratory (LTCM), Ecole Polytechnique Fédérale de Lausanne (EPFL), EPFL STI IGM LTCM/EL H0 094/Station 9 CH-1015 Lausanne, Switzerland

Abstract

On-chip two-phase cooling of parallel pseudo-CPUs integrated into a liquid pumped cooling cycle is modeled and experimentally verified versus a prototype test loop. The system's dynamic operation is studied since the heat dissipated by microprocessors is continuously changing during their operation and critical heat flux (CHF) conditions in the microevaporator must be avoided by flow control of the pump speed during heat load disturbances. The purpose here is to cool down multiple microprocessors in parallel and their auxiliary electronics (memories, dc/dc converters, etc.) to emulate datacenter servers with multiple CPUs. The dynamic simulation code was benchmarked using the test results obtained in an experimental facility consisting of a liquid pumped cooling cycle assembled in a test loop with two parallel microevaporators, which were evaluated under steady-state and transient conditions of balanced and unbalanced heat fluxes on the two pseudochips. The errors in the model's predictions of mean chip temperature and mixed exit vapor quality at steady state remained within ±10%. Transient comparisons showed that the trends and the time constants were satisfactorily respected. A case study considering four microprocessors cooled in parallel flow was then simulated for different levels of heat flux in the microprocessors (40, 30, 20, and 10 W cm−2), which showed the robustness of the predictive-corrective solver used. For a desired mixed vapor exit quality of 30%, at an inlet pressure and subcooling of 1600 kPa and 3 K, the resulting distribution of mass flow rate in the microevaporators was, respectively, 2.6, 2.9, 4.2, and 6.4 kg h−1 (mass fluxes of 47, 53, 76 and 116 kg m−2 s−1) and yielded approximately uniform chip temperatures (maximum variation of 2.6, 2, 1.7, and 0.7 K). The vapor quality and maximum chip temperature remained below the critical limits during both transient and steady-state regimes.

Publisher

ASME International

Subject

Electrical and Electronic Engineering,Computer Science Applications,Mechanics of Materials,Electronic, Optical and Magnetic Materials

Reference25 articles.

1. Patel, C. D., 2003, “A Vision of Energy Aware Computing From Chips to Data Centers,” The International Symposium on Micro-Mechanical Engineering, Tsuchiura and Tsukuba, Japan, December 1–3, Paper No. ISMME2003-K15.

2. Efficiency Improvements of a Thermal Power Plant by Making Use of the Waste Heat of Large Datacenters Using Two-Phase On-Chip Cooling,2011

3. Cooling of Microprocessors With Micro-Evaporation: A Novel Two-Phase Cooling Cycle;Int. J. Refrigeration,2011

4. Advances in Electronics Cooling;Int. J. Heat Transfer Eng.,2013

5. The Steady State Modeling and Optimization of a Refrigeration System for High Heat Flux Removal;Appl. Therm. Eng.,2010

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