Affiliation:
1. IBM Thomas J. Watson Research Center
Publisher
Japan Institute of Electronics Packaging
Subject
Electrical and Electronic Engineering
Reference20 articles.
1. 1) M. Koyanagi, H. Kurino, K. W. Lee, K. Sakuma, et al.: "Future System-on-Silicon LSI chips," IEEE MICRO, Vol. 18, No. 4, pp. 17–22, Jul/Aug., 1998
2. 2) 小椋正気:“矛盾に見つける真理とチャンス,”応用物理,Vol. 67, No. 8, pp. 955–957, 1998
3. 3) https://en.wikipedia.org/wiki/IBM_Research
4. 4) S. J. Koester, R. R. Yu, et al.: "Wafer-level 3D integration technology," IBM J. Res. & Dev., Vol. 52, No. 6, pp. 583–597, 2008
5. 5) K. Sakuma, et al.: "3D Chip-Stacking Technology with Through-Silicon Vias and Low-Volume Lead-Free Interconnections," IBM J. Res. & Dev., Vol. 52, No. 6, pp. 611–622, 2008