A 14-bit current-mode /spl Sigma//spl Delta/ DAC based upon rotated data weighted averaging-Reference-Cited by-同舟云学术

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A 14-bit current-mode /spl Sigma//spl Delta/ DAC based upon rotated data weighted averaging

Published:2000-08 Issue:8 Volume:35 Page:1074-1084
ISSN:0018-9200
Container-title:IEEE Journal of Solid-State Circuits
language:
Short-container-title:IEEE J. Solid-State Circuits

Author:

Radke R.E.,Eshraghi A.,Fiez T.S.

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Link

http://xplorestaging.ieee.org/ielx5/4/18654/00859496.pdf?arnumber=859496

Cited by 43 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. A random shifting data weighted averaging algorithm for Nyquist-rate DAC;IEICE Electronics Express;2023-10-25

2. A Noise-shaping SAR Assisted MASH 2-1 Sigma-Delta Modulator;2020 International Symposium on VLSI Design, Automation and Test (VLSI-DAT);2020-08

3. Low-Cost, High-Precision DAC Design Based on Ordered Element Matching;IEEE Transactions on Circuits and Systems I: Regular Papers;2019-02

4. Taxonomy of ΣΔ Architectures;Sigma-Delta Converters;2018-09-03

5. A resistive DAC for a multi-stage sigma-delta modulator DAC with dynamic element matching;Analog Integrated Circuits and Signal Processing;2018-06-25

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