A resistive DAC for a multi-stage sigma-delta modulator DAC with dynamic element matching
Author:
Funder
Australian Research Council
Publisher
Springer Science and Business Media LLC
Subject
Surfaces, Coatings and Films,Hardware and Architecture,Signal Processing
Link
http://link.springer.com/article/10.1007/s10470-018-1240-3/fulltext.html
Reference25 articles.
1. Shettigar, P., & Pavan, S. (2012). Design techniques for wideband single-bit continuous-time delta-sigma modulators with FIR feedback DACs. IEEE Journal of Solid-State Circuits, 47(12), 2865–2879. https://doi.org/10.1109/JSSC.2012.2217871 .
2. Schreier, R., & Temes, G. (2005). Understanding delta-sigma data converters (1st ed.). Piscataway, NJ: Wiley.
3. Radke, R., & Eshraghi, A. (2000). A 14-bit current-mode sigma delta DAC based upon rotated data weighted averaging. IEEE Journal of Solid-State Circuits, 35(8), 1074–1084.
4. Luschas, S., & Lee, H. S. (2003). Output impedance requirements for DACs. In Proceedings of 2003 international symposium on circuits and systems, 2003, ISCAS ’03 (Vol. 1, pp. I-861–I-864). https://doi.org/10.1109/ISCAS.2003.1205700 .
5. Mercer, D. (2004). A study of error sources in current steering digital-to-analog converters. In Proceedings of the IEEE 2004 on custom integrated circuits conference (pp. 185–190). https://doi.org/10.1109/CICC.2004.1358771 .
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