Spatio-Temporal Bias-Tunable Readout Circuit for On-Chip Intelligent Image Processing-Reference-Cited by-同舟云学术

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Spatio-Temporal Bias-Tunable Readout Circuit for On-Chip Intelligent Image Processing

Published:2016-11 Issue:11 Volume:63 Page:1825-1832
ISSN:1549-8328
Container-title:IEEE Transactions on Circuits and Systems I: Regular Papers
language:
Short-container-title:IEEE Trans. Circuits Syst. I

Author:

Fiorante Glauco Rogerio Cugler,Ghasemi Javad,Zarkesh-Ha Payman,Krishna Sanjay

Funder

Engineering Research Centers Program (ERC)

National Science Foundation

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Link

http://ieeexplore.ieee.org/ielaam/8919/7676403/7592410-aam.pdf

Cited by 6 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. A Digital Readout Integrated Circuit Based on Pixel-Level ADC Incorporating On-Chip Image Algorithm Calibration for IRFPA;IEEE Sensors Journal;2023-09-15

2. Noise Model of Large-Format Readout Integrated Circuit for Infrared Focal Plane Array;IEEE Transactions on Circuits and Systems I: Regular Papers;2023-01

3. Design of imaging evaluation system for infrared thermal imager;AOPC 2019: Optical Sensing and Imaging Technology;2019-12-18

4. A DROIC Based on PFM ADCs Employing Over-Integration for Error Shaping;IEEE Transactions on Circuits and Systems I: Regular Papers;2019-10

5. In-pixel analog memories for a pixel-based background subtraction algorithm on CMOS vision sensors;International Journal of Circuit Theory and Applications;2018-04-16

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