A Digital Readout Integrated Circuit Based on Pixel-Level ADC Incorporating On-Chip Image Algorithm Calibration for IRFPA-Reference-Cited by-同舟云学术

A Digital Readout Integrated Circuit Based on Pixel-Level ADC Incorporating On-Chip Image Algorithm Calibration for IRFPA

Published:2023-09-15 Issue:18 Volume:23 Page:21747-21756
ISSN:1530-437X
Container-title:IEEE Sensors Journal
language:
Short-container-title:IEEE Sensors J.

Author:

Zeng Yan¹,Yang Shiheng¹^ORCID,Liu Yueduo¹^ORCID,Bao Rongxin¹,Zhu Zihao¹^ORCID,Lin Jiahui¹,Zhou Xiong¹^ORCID,Chen Yong²^ORCID,Yin Jun²^ORCID,Mak Pui-In²^ORCID,Li Qiang¹^ORCID

Affiliation:

1. School of Electronic Science and Engineering, University of Electronic Science and Technology of China (UESTC), Chengdu, China

2. Department of ECE, State Key Laboratory of Analog and Mixed-Signal VLSI and the Faculty of Science and Technology, University of Macau, Macau, China

Funder

National Natural Science Foundation of China

Science Foundation of Sichuan

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Instrumentation

Link

http://xplorestaging.ieee.org/ielx7/7361/10251409/10209567.pdf?arnumber=10209567

Reference20 articles.

1. A DROIC Based on PFM ADCs Employing Over-Integration for Error Shaping

2. A Compact Low-Noise Digital Pixel with 15-bit Two-Step PFM-based ADC for IRFPAs

3. A PFM-Based Digital Pixel With an Off-Pixel Residue Measurement for Small Pitch FPAs

4. A 160×160 pixel analog-counting single-photon imager with time-gating and self-referenced column-parallel A/D conversion for fluorescence lifetime imaging;perenzoni;IEEE J Solid-State Circuits,2016

5. A 33 $\mu$W 64$\,\times\,$64 Pixel Vision Sensor Embedding Robust Dynamic Background Subtraction for Event Detection and Scene Interpretation

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