Robust Pattern Generation for Small Delay Faults Under Process Variations
Author:
Affiliation:
1. University of Stuttgart,Stuttgart,Germany,70569
2. Paderborn University,Paderborn,Germany,33098
Funder
German Research Foundation
University of Stuttgart
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10350036/10350038/10351052.pdf?arnumber=10351052
Reference22 articles.
1. GPU-Accelerated Simulation of Small Delay Faults
2. Timing-Aware ATPG for High Quality At-speed Testing of Small Delay Defects
3. Keytone: Silent Data Corruptions at Scale
4. Detection and prevention of silent data corruption in an exabyte-scale database system;Bacon,2022
5. Cores that don't count
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2. Robust Test of Small Delay Faults under PVT-Variations;2024 2nd International Symposium of Electronics Design Automation (ISEDA);2024-05-10
3. Vmin Testing under Variations: Defect vs. Fault Coverage;2024 IEEE 25th Latin American Test Symposium (LATS);2024-04-09
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