A 2.3 mW 10-bit 170 MS/s Two-Step Binary-Search Assisted Time-Interleaved SAR ADC-Reference-Cited by-同舟云学术

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A 2.3 mW 10-bit 170 MS/s Two-Step Binary-Search Assisted Time-Interleaved SAR ADC

Published:2013-08 Issue:8 Volume:48 Page:1783-1794
ISSN:0018-9200
Container-title:IEEE Journal of Solid-State Circuits
language:
Short-container-title:IEEE J. Solid-State Circuits

Author:

Wong Si-Seng,Chio U-Fat,Zhu Yan,Sin Sai-Weng,U Seng-Pan,Martins Rui Paulo

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Link

http://ieeexplore.ieee.org/iel7/4/6564404/06517524.pdf

Cited by 25 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. A novel Sub-Radix-2 technique for low power Time – Interleaved SAR ADC;2023-11-01

2. An 11-bit 160-MS/s Non-binary C-based SAR ADC with a Partially Monotonic Switching Scheme;JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE;2023-04-30

3. Asynchronous capacitive SAR ADC based on Hopfield network;IEICE Electronics Express;2022-09-25

4. Design of High Speed Time – Interleaved SAR Analog to Digital Converter;2022 6th International Conference on Devices, Circuits and Systems (ICDCS);2022-04-21

5. A Patient-Specific Closed-Loop Epilepsy Management SoC With One-Shot Learning and Online Tuning;IEEE Journal of Solid-State Circuits;2022-04

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