A High-Speed 7.2-ns Read-Write Random Access 4-Mb Embedded Resistive RAM (ReRAM) Macro Using Process-Variation-Tolerant Current-Mode Read Schemes-Reference-Cited by-同舟云学术

A High-Speed 7.2-ns Read-Write Random Access 4-Mb Embedded Resistive RAM (ReRAM) Macro Using Process-Variation-Tolerant Current-Mode Read Schemes

Published:2013-03 Issue:3 Volume:48 Page:878-891
ISSN:0018-9200
Container-title:IEEE Journal of Solid-State Circuits
language:
Short-container-title:IEEE J. Solid-State Circuits

Author:

Chang Meng-Fan,Sheu Shyh-Shyuan,Lin Ku-Feng,Wu Che-Wei,Kuo Chia-Chen,Chiu Pi-Feng,Yang Yih-Shan,Chen Yu-Sheng,Lee Heng-Yuan,Lien Chen-Hsin,Chen Frederick T.,Su Keng-Li,Ku Tzu-Kun,Kao Ming-Jer,Tsai Ming-Jinn

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Link

http://xplorestaging.ieee.org/ielx5/4/6466407/06384825.pdf?arnumber=6384825

Cited by 67 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Data-cell-variation-tolerant triple sampling non-destructive self-reference sensing scheme of STT-MRAM;AIP Advances;2024-02-01

2. Fully Parallel and Reconfigurable Realization of DFT/IDFT using In-Memory Computing;2023 10th International Conference on Wireless Networks and Mobile Communications (WINCOM);2023-10-26

3. Reordering-Less FFT: A Novel FFT Processor with Parallel Input/Output in Normal Order;2023 International Conference on Software, Telecommunications and Computer Networks (SoftCOM);2023-09-21

4. Towards Low-Complexity, Fully Parallel and Flexible Hardware Realization of DCT/IDCT;2023 16th International Conference on Signal Processing and Communication System (ICSPCS);2023-09-06

5. Design of a Current Sense Amplifier with Dynamic Reference for Reliable Resistive Memory;2023 21st IEEE Interregional NEWCAS Conference (NEWCAS);2023-06-26