A Single-Ended Disturb-Free 9T Subthreshold SRAM With Cross-Point Data-Aware Write Word-Line Structure, Negative Bit-Line, and Adaptive Read Operation Timing Tracing-Reference-Cited by-同舟云学术

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A Single-Ended Disturb-Free 9T Subthreshold SRAM With Cross-Point Data-Aware Write Word-Line Structure, Negative Bit-Line, and Adaptive Read Operation Timing Tracing

Published:2012-06 Issue:6 Volume:47 Page:1469-1482
ISSN:0018-9200
Container-title:IEEE Journal of Solid-State Circuits
language:
Short-container-title:IEEE J. Solid-State Circuits

Author:

Tu Ming-Hsien,Lin Jihi-Yu,Tsai Ming-Chien,Lu Chien-Yu,Lin Yuh-Jiun,Wang Meng-Hsueh,Huang Huan-Shun,Lee Kuen-Di,Shih Wei-Chiang,Jou Shyh-Jye,Chuang Ching-Te

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Link

http://xplorestaging.ieee.org/ielx5/4/6203507/06183492.pdf?arnumber=6183492

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