A 5-Gb/s ADC-Based Feed-Forward CDR in 65 nm CMOS

Author:

Tyshchenko Oleksiy,Sheikholeslami Ali,Tamura Hirotaka,Kibune Masaya,Yamaguchi Hisakatsu,Ogawa Junji

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Cited by 13 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. A 28-Gb/s 13.8-mW Half-Rate Bang-Bang Clock and Data Recovery Circuit Using Return-to-Zero-Based Symmetrical Bang-Bang Phase Detector;2022 IEEE Nordic Circuits and Systems Conference (NorCAS);2022-10-25

2. A 0.5 to 1.7 Gbps PI-CDR with a Wide Frequency-Tracking Range;Journal of Circuits, Systems and Computers;2017-12-06

3. Analysis of Timing and Frequency Offsets on OFDM Systems for Fractional Sampling Rate;IEICE Transactions on Communications;2017

4. A 3x blind ADC-based CDR for a 20 dB loss channel;IEEE Transactions on Circuits and Systems I: Regular Papers;2015-06

5. 4×, 3‐level, blind ADC‐based receiver;Electronics Letters;2015-04

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