A 0.003 mm<formula formulatype="inline"><tex Notation="TeX">$^{2}$</tex></formula> 10 b 240 MS/s 0.7 mW SAR ADC in 28 nm CMOS With Digital Error Correction and Correlated-Reversed Switching-Reference-Cited by-同舟云学术

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A 0.003 mm$^{2}$ 10 b 240 MS/s 0.7 mW SAR ADC in 28 nm CMOS With Digital Error Correction and Correlated-Reversed Switching

Published:2015-06 Issue:6 Volume:50 Page:1382-1398
ISSN:0018-9200
Container-title:IEEE Journal of Solid-State Circuits
language:
Short-container-title:IEEE J. Solid-State Circuits

Author:

Tsai Jen-Huan,Wang Hui-Huan,Yen Yang-Chi,Lai Chang-Ming,Chen Yen-Ju,Huang Po-Chuin,Hsieh Ping-Hsuan,Chen Hsin,Lee Chao-Cheng

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Link

http://xplorestaging.ieee.org/ielx7/4/7112217/07091951.pdf?arnumber=7091951

Cited by 63 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. A High-Resolution Pipelined-SAR ADC Using Cyclically Charged Floating Inverter Amplifier;IEEE Journal of Solid-State Circuits;2024

2. Behavioral Model for High-Speed SAR ADCs With On-Chip References;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2023-12

3. A Low-Power 8-to-12-bit Reconfigurable SAR ADC for Portable Ultrasound Systems;2023 IEEE Biomedical Circuits and Systems Conference (BioCAS);2023-10-19

4. A 12-Bit 260-MS/s Pipelined-SAR ADC With Ring-TDC-Based Fine Quantizer for Automatic Cross-Domain Scale Alignment;IEEE Journal of Solid-State Circuits;2023-10

5. A 0.9-V 50-MS/s 67.3-dB-SNDR SAR-ISDM ADC With an Oscillator-Based Integrator;IEEE Transactions on Circuits and Systems II: Express Briefs;2023-09

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