Modelling and Analysis of FPGA-based MPSoC System with Multiple DNN Accelerators

Author:

Gao Cong1,Zhu Xuqi1,Saha Sangeet1,McDonald-Maier Klaus D1,Zhai Xiaojun1

Affiliation:

1. University of Essex,Colchester,United Kingdom

Funder

Engineering and Physical Sciences Research Council

Publisher

IEEE

Reference16 articles.

1. SECDA: Efficient Hardware/Software Co-Design of FPGA-based DNN Accelerators for Edge Inference

2. Exploring HW/SW Co-Design for Video Analysis on CPU-FPGA Heterogeneous Systems

3. Once for all: Train one network and specialize it for efficient deployment;cai;International Conference on Learning Representations,2020

4. Dpuczdx8g for zynq ultrascale+ mpsocs product guide (pg338);Tech Rep,2023

5. FPGA/DNN Co-Design

Cited by 2 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Pulsed Laser Single Event Effect on Deep Neural Network of Xilinx Ultrascale+ MPSoC;IEEE Transactions on Nuclear Science;2024-05

2. Bayesian Optimization for Efficient Heterogeneous MPSoC Based DNN Accelerator Runtime Tuning;2023 33rd International Conference on Field-Programmable Logic and Applications (FPL);2023-09-04

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