SECDA: Efficient Hardware/Software Co-Design of FPGA-based DNN Accelerators for Edge Inference-Reference-Cited by-同舟云学术

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SECDA: Efficient Hardware/Software Co-Design of FPGA-based DNN Accelerators for Edge Inference

Published:2021-10 Issue: Volume: Page:
ISSN:
Container-title:2021 IEEE 33rd International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD)
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Author:

Haris Jude,Gibson Perry,Cano Jose,Agostini Nicolas Bohm,Kaeli David

Funder

Engineering and Physical Sciences Research Council

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/9651510/9651558/09651579.pdf?arnumber=9651579

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3. Exploring Processor Micro-architectures Optimised for BLAS3 Micro-kernels;Lecture Notes in Computer Science;2024

4. Performance Modeling and Estimation of a Configurable Output Stationary Neural Network Accelerator;2023 IEEE 35th International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD);2023-10-17

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