14.1 A Software-Assisted Peak Current Regulation Scheme to Improve Power-Limited Inference Performance in a 5nm AI SoC-Reference-Cited by-同舟云学术

14.1 A Software-Assisted Peak Current Regulation Scheme to Improve Power-Limited Inference Performance in a 5nm AI SoC

Published:2024-02-18 Issue: Volume: Page:254-256
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Container-title:2024 IEEE International Solid-State Circuits Conference (ISSCC)
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Author:

Kar Monodeep¹,Silberman Joel¹,Venkataramani Swagath¹,Srinivasan Viji¹,Fleischer Bruce¹,Rubin Joshua¹,Lancaster JohnDavid¹,Lee Saekyu¹,Cohen Matthew¹,Ziegler Matthew¹,Cao Nianzheng¹,Woodward Sandra²,Agrawal Ankur¹,Zhou Ching¹,Chatarasi Prasanth¹,Gooding Thomas²,Guillorn Michael¹,Hekmatshoartabari Bahman¹,Jacob Philip¹,Jain Radhika¹,Jain Shubham¹,Jung Jinwook¹,Kim Kyu-Hyoun¹,Koswatta Siyu¹,Lutz Martin¹,Mannari Alberto³,Mathew Abey⁴,Nair Indira¹,Ranjan Ashish¹,Ren Zhibin¹,Rider Scot⁵,Roewer Thomas¹,Satterfield David⁶,Schaal Marcel¹,Sen Sanchari¹,Tellez Gustavo¹,Tran Hung¹,Wang Wei¹,Zalani Vidhi¹,Zhang Jintao¹,Zhang Xin¹,Shah Vinay⁷,Senger Robert¹,Kumar Arvind¹,Lu Pong-Fei¹,Chang Leland¹

Affiliation:

1. IBM Research,Yorktown Heights,NY

2. IBM,Rochester,MN

3. IBM Research,Zurich,Switzerland

4. IBM,Austin,TX

5. IBM,Poughkeepsie,NY

6. IBM Research,Lowell,MA

7. IBM,Hursley,United Kingdom

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/10454133/10454267/10454301.pdf?arnumber=10454301

Reference5 articles.

1. RaPiD: AI Accelerator for Ultra-low Precision Training and Inference

2. 35.3 Thread-Level Power Management for a Current- and Temperature-Limiting System in a 7nm Hexagon™ Processor

3. 4.3 Fine-grained adaptive power management of the SPARC M7 processor

4. 9.1 A 7nm 4-Core AI Chip with 25.6TFLOPS Hybrid FP8 Training, 102.4TOPS INT4 Inference and Workload-Aware Throttling

5. 22.9 A 12nm 18.1TFLOPs/W Sparse Transformer Processor with Entropy-Based Early Exit, Mixed-Precision Predication and Fine-Grained Power Management