9.1 A 7nm 4-Core AI Chip with 25.6TFLOPS Hybrid FP8 Training, 102.4TOPS INT4 Inference and Workload-Aware Throttling-Reference-Cited by-同舟云学术

9.1 A 7nm 4-Core AI Chip with 25.6TFLOPS Hybrid FP8 Training, 102.4TOPS INT4 Inference and Workload-Aware Throttling

Published:2021-02-13 Issue: Volume: Page:
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Container-title:2021 IEEE International Solid- State Circuits Conference (ISSCC)
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Author:

Agrawal Ankur,Lee Sae Kyu,Silberman Joel,Ziegler Matthew,Kang Mingu,Venkataramani Swagath,Cao Nianzheng,Fleischer Bruce,Guillorn Michael,Cohen Matthew,Mueller Silvia,Oh Jinwook,Lutz Martin,Jung Jinwook,Koswatta Siyu,Zhou Ching,Zalani Vidhi,Bonanno James,Casatuta Robert,Chen Chia-Yu,Choi Jungwook,Haynie Howard,Herbert Alyssa,Jain Radhika,Kar Monodeep,Kim Kyu-Hyoun,Li Yulong,Ren Zhibin,Rider Scot,Schaal Marcel,Schelm Kerstin,Scheuermann Michael,Sun Xiao,Tran Hung,Wang Naigang,Wang Wei,Zhang Xin,Shah Vinay,Curran Brian,Srinivasan Vijayalakshmi,Lu Pong-Fei,Shukla Sunil,Chang Leland,Gopalakrishnan Kailash

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/9365732/9365735/09365791.pdf?arnumber=9365791

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