9.1 A 2mW 70.7dB SNDR 200MS/s Pipelined-SAR ADC with Continuous-Time SAR-Assisted Detect-and-Skip and Open-then-Close Correlated Level Shifting-Reference-Cited by-同舟云学术

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9.1 A 2mW 70.7dB SNDR 200MS/s Pipelined-SAR ADC with Continuous-Time SAR-Assisted Detect-and-Skip and Open-then-Close Correlated Level Shifting

Published:2024-02-18 Issue: Volume: Page:168-170
ISSN:
Container-title:2024 IEEE International Solid-State Circuits Conference (ISSCC)
language:
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Author:

Ye Siyuan¹,Shen Linxiao¹,Gao Jihang¹,Li Jie¹,Chen Zhuoyi¹,Xu Xinhang¹,Cui Jiajia¹,Zhang Hao²,Zhang Xing¹,Ye Le¹,Huang Ru¹

Affiliation:

1. Peking University,Beijing,China

2. Nano Core Chip Electronic Technology,Hangzhou,China

Funder

National Natural Science Foundation of China

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/10454133/10454267/10454412.pdf?arnumber=10454412

Reference6 articles.

1. A 0.004mm² 200MS/S Pipelined SAR ADC with kT/C Noise Cancellation and Robust Ring-Amp

2. 11.2 A 0.85fJ/conversion-step 10b 200kS/s subranging SAR ADC in 40nm CMOS

3. A 0.01mm² 25μW 2MS/s 74dB-SNDR Continuous-Time Pipelined-SAR ADC with 120fF Input Capacitor;Shen;ISSCC,2019

4. A 0.82mW 14b 130MS/S Pipelined-SAR ADC With a Distributed Averaging Correlated Level Shifting (DACLS) Ringamp and Bypass-Window Backend

5. 23.1 A 7.9fJ/Conversion-Step and 37.12aF_rms Pipelined-SAR Capacitance-to-Digital Converter with kT/C Noise Cancellation and Incomplete-Settling-Based Correlated Level Shifting

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