A 0.004mm2 200MS/S Pipelined SAR ADC with kT/C Noise Cancellation and Robust Ring-Amp
Author:
Affiliation:
1. Tsinghua University,Beijing,China
2. Peking University,Beijing,China
Funder
National Key R&D Program of China
Beijing National Research Center for Information Science and Technology
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/9731529/9731102/09731599.pdf?arnumber=9731599
Reference6 articles.
1. A 10.0 ENOB, 6.2 fJ/conv.-step, 500 MS/s Ringamp-Based Pipelined-SAR ADC with Background Calibration and Dynamic Reference Regulation in 16nm CMOS
2. 16.4 A Calibration-Free 71.7dB SNDR 100MS/s 0.7mW Weighted-Averaging Correlated Level Shifting Pipelined SAR ADC with Speed-Enhancement Scheme
3. A 72.6 dB SNDR 14b 100 MSPS Ring Amplifier Based Pipelined SAR ADC with Dynamic Deadzone Control in 16 nm CMOS
4. A calibration-free 2.3 mW 73.2 dB SNDR 15b 100 MS/s four-stage fully differential ring amplifier based SAR-assisted pipeline ADC
5. 16.5 A 13b 0.005mm2 40MS/s SAR ADC with kT/C Noise Cancellation
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1. Analysis of the Second-Order NS SAR ADC Performance Enhancement Based on Active Gain;Electronics;2024-08-27
2. An improved kT/C noise cancellation technique with presampling for high‐speed SAR ADCs;Electronics Letters;2024-08
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4. A Self-Calibrated Sampling Noise Cancellation Technique for Noise-Shaping SAR ADC;2024 IEEE International Symposium on Circuits and Systems (ISCAS);2024-05-19
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