16.5 DynaPlasia: An eDRAM In-Memory-Computing-Based Reconfigurable Spatial Accelerator with Triple-Mode Cell for Dynamic Resource Switching-Reference-Cited by-同舟云学术

16.5 DynaPlasia: An eDRAM In-Memory-Computing-Based Reconfigurable Spatial Accelerator with Triple-Mode Cell for Dynamic Resource Switching

Published:2023-02-19 Issue: Volume: Page:
ISSN:
Container-title:2023 IEEE International Solid- State Circuits Conference (ISSCC)
language:
Short-container-title:

Author:

Kim Sangjin¹,Li Zhiyong¹,Um Soyeon¹,Jo Wooyoung¹,Ha Sangwoo¹,Lee Juhyoung¹,Kim Sangyeob¹,Han Donghyeon¹,Yoo Hoi-Jun¹

Affiliation:

1. Korea Advanced Institute of Science and Technology,Daejeon,Korea

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/10067248/10067251/10067352.pdf?arnumber=10067352

Reference6 articles.

1. 16.2 eDRAM-CIM: Compute-In-Memory Design with Reconfigurable Embedded-Dynamic-Memory Array Realizing Adaptive Data Converters and Charge-Domain Computing

2. DIANA: An End-to-End Energy-Efficient Digital and ANAlog Hybrid Neural Network SoC

3. A 65nm 3T Dynamic Analog RAM-Based Computing-in-Memory Macro and CNN Accelerator with Retention Enhancement, Adaptive Analog Sparsity and 44TOPS/w System Energy Efficiency;chen;ISSCC,2021

4. Gain-Cell CIM: Leakage and Bitline Swing Aware 2T1C Gain-Cell eDRAM Compute in Memory Design with Bitline Precharge DACs and Compact Schmitt Trigger ADCs

5. PIMCA: A 3.4-Mb Programmable In-Memory Computing Accelerator in 28nm for On-Chip DNN Inference

Cited by 14 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. FLEX-CIM: A Flexible Kernel Size 1-GHz 181.6-TOPS/W 25.63-TOPS/mm² Analog Compute-in-Memory Macro;IEEE Journal of Solid-State Circuits;2024-09

2. Area- and Power-Efficient Compute-in-Memory Macro Based on Oxide Semiconductor 2T0C eDRAM With Cell-System Co-Optimization;IEEE Transactions on Electron Devices;2024-09

3. Scaling-CIM: eDRAM In-Memory-Computing Accelerator With Dynamic-Scaling ADC and Adaptive Analog Operation;IEEE Journal of Solid-State Circuits;2024-08

4. Impact of Input Encoding and ADC Resolution on Matrix-Vector Multiplication Accuracy;2024 19th Conference on Ph.D Research in Microelectronics and Electronics (PRIME);2024-06-09

5. An eDRAM-Based Computing-in-Memory Macro With Full-Valid-Storage and Channel-Wise-Parallelism for Depthwise Neural Network;IEEE Transactions on Circuits and Systems II: Express Briefs;2024-05