Si-gate CMOS devices on a Si lateral solid-phase epitaxial layer-Reference-Cited by-同舟云学术

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Si-gate CMOS devices on a Si lateral solid-phase epitaxial layer

Published:1989-03 Issue:3 Volume:36 Page:548-552
ISSN:0018-9383
Container-title:IEEE Transactions on Electron Devices
language:
Short-container-title:IEEE Trans. Electron Devices

Author:

Hirashita N.,Katoh T.,Onoda H.

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials

Link

http://xplorestaging.ieee.org/ielx1/16/790/00019967.pdf?arnumber=19967

Cited by 9 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. References;Three-Dimensional Integrated Circuit Design;2017

2. References;Three-dimensional Integrated Circuit Design;2009

3. Cross-sectional Transmission Electron Microscope Studies on Intrinsic Breakdown Spots of Thin Gate Oxides;Japanese Journal of Applied Physics;1997-05-15

4. Temperature-independent carrier mobility in large-grain poly-Si transistors;IEEE Transactions on Electron Devices;1994

5. TEM analysis of voids in UHV-deposited amorphous Si layers used for lateral solid phase epitaxial growth;Journal of Crystal Growth;1992-03

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