Measurement, Analyses and Discussion on Noise Induced on Gate Driver Logic Signal Traces in Medium Voltage SiC-based Power Converters
Author:
Affiliation:
1. Center for Power Electronics Systems Virginia Tech,Arlington,VA,USA
2. Center for Power Electronics Systems Virginia Tech,Blacksburg,VA,USA
Funder
Office of Naval Research
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10241361/10241364/10241729.pdf?arnumber=10241729
Reference11 articles.
1. Common-Mode Noise Current Simulation and Measurement on a Gate Driver for SiC MOSFET Half-Bridge Modules
2. High-Scalability Enhanced Gate Drivers for SiC MOSFET Modules With Transient Immunity Beyond 100 V/ns
3. High dv/dt Noise Modeling and Reduction on Control Circuits of GaN-Based Full Bridge Inverters
4. A high-speed gate driver with pcb-embedded rogowski switch current sensor for a 10 kv, 240 a, sic mosfet module;wang;2018 IEEE Energy Conversion Congress and Exposition (ECCE),2018
5. Design of a 10 kV SiC MOSFET-based high-density, high-efficiency, modular medium-voltage power converter;mocevic;iEnergy,2022
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1. Gate Driver CM Noise Minimization by Impedance Balancing with Integrated Rogowski Sensor;2024 IEEE Applied Power Electronics Conference and Exposition (APEC);2024-02-25
2. Investigation on Noise Caused by Gate Driver IC and Near Field Coupling within Gate Driver PCBs for Medium Voltage SiC-based Converters;2024 IEEE Applied Power Electronics Conference and Exposition (APEC);2024-02-25
3. Power Electronics for All-Electric Aircraft: A Review;2023 IEEE 8th Southern Power Electronics Conference and 17th Brazilian Power Electronics Conference (SPEC/COBEP);2023-11-26
4. Noise Propagation Study within Gate Drivers for Medium-Voltage High Power SiC-Based Converters, Caused by Near Field Coupling;2023 IEEE Energy Conversion Congress and Exposition (ECCE);2023-10-29
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