Author:
Saokar Sandesh S.,Banakar R. M.,Siddamal Saroja
Cited by
9 articles.
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1. Fixed-point Encoding and Architecture Exploration for Residue Number Systems;ACM Transactions on Architecture and Code Optimization;2024-09-14
2. Energy Efficient Vedic Multiplier;2024 IEEE International Conference on Interdisciplinary Approaches in Technology and Management for Social Innovation (IATMSI);2024-03-14
3. A 64 BIT MAC Unit Design based on FPGA Using Vedic Multiplier;2023 Global Conference on Information Technologies and Communications (GCITC);2023-12-01
4. Circuit Design of a Novel Analog Multiplier;2023 9th International Conference on Control Science and Systems Engineering (ICCSSE);2023-06-16
5. Design and Analysis of 8-bit Vedic Multiplier;2023 5th Biennial International Conference on Nascent Technologies in Engineering (ICNTE);2023-01-20