Affiliation:
1. Computer Science, Kennesaw State University, Marietta, United States
2. Information Technology, Kennesaw State University, Marietta, United States
Abstract
Residue Number Systems (RNS) demonstrate the fascinating potential to serve integer addition/ multiplication-intensive applications. The complexity of Artificial Intelligence (AI) models has grown enormously in recent years. From a computer system’s perspective, ensuring the training of these large-scale AI models within an adequate time and energy consumption has become a big concern. Matrix multiplication is a dominant subroutine in many prevailing AI models, with an addition/multiplication-intensive attribute. However, the data type of matrix multiplication within machine learning training typically requires real numbers, which indicates that RNS benefits for integer applications cannot be directly gained by AI training. The state-of-the-art RNS real-number encodings, including floating-point and fixed-point, have defects and can be further enhanced. To transform default RNS benefits to the efficiency of large-scale AI training, we propose a low-cost and high-accuracy RNS fixed-point representation:
Single RNS Logical Partition (S-RNS-Logic-P) representation with Scaling-down Postprocessing Multiplication (SD-Post-Mul)
. Moreover, we extend the implementation details of the other two RNS fixed-point methods:
Double RNS Concatenation
and
S-RNS-Logic-P representation with Scaling-down Preprocessing Multiplication
. We also design the architectures of these three fixed-point multipliers. In empirical experiments, our
S-RNS-Logic-P representation with SD-Post-Mul
method achieves less latency and energy overhead while maintaining good accuracy. Furthermore, this method can easily extend to the Redundant Residue Number System to raise the efficiency of error-tolerant domains, such as improving the error correction efficiency of quantum computing.
Publisher
Association for Computing Machinery (ACM)
Reference72 articles.
1. IEEE standard for floating-point arithmetic. 2008. IEEE Std 754-2008 (2008) 1–70. 10.1109/IEEESTD.2008.4610935
2. DeepBench. 2016. Retrieved from https://github.com/baidu-research/deepbench. (2016).
3. IEEE standard for floating-point arithmetic. 2019. IEEE Std 754-2019 (Revision of IEEE 754-2008). (2019) 1–84. 10.1109/IEEESTD.2019.8766229
4. Nanobench. Retrieved from https://github.com/martinus/nanobench. Access on June 2023.
5. TOP500 LIST –JUNE 2023. 2023. Retrieved from https://www.top500.org/lists/top500/list/2023/06/