Design of an Extremely Energy-Efficient Hardware Algorithm Using Adiabatic Superconductor Logic-Reference-Cited by-同舟云学术

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Design of an Extremely Energy-Efficient Hardware Algorithm Using Adiabatic Superconductor Logic

Published:2015-07 Issue: Volume: Page:
ISSN:
Container-title:2015 15th International Superconductive Electronics Conference (ISEC)
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Author:

Xu Q.,Yamanashi Y.,Ayala C. L.,Takeuchi N.,Ortlepp T.,Yoshikawa N.

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/7381586/7383419/07383446.pdf?arnumber=7383446

Cited by 8 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

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4. Superconducting Shuttle-Flux Shift Register for Race Logic and Its Applications;IEEE Transactions on Circuits and Systems I: Regular Papers;2023-01

5. Superconducting Digital DIT Butterfly Unit for Fast Fourier Transform Using Race Logic;2022 20th IEEE Interregional NEWCAS Conference (NEWCAS);2022-06-19

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