Combined Internal Attacks on SoC-FPGAs: Breaking AES with Remote Power Analysis and Frequency-based Covert Channels
Author:
Affiliation:
1. UJM Saint-Etienne CNRS Institut d’Optique Graduate School Lab. H. Curien UMR 5516,SAINT-ETIENNE,France,F-42023
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10190553/10190632/10190692.pdf?arnumber=10190692
Reference23 articles.
1. Differential Power Analysis;kocher;CRYPTO 1999,1999
2. Correlated power noise generator as a low cost DPA countermeasures to secure hardware AES cipher
3. FPGA-Based Remote Power Side-Channel Attacks
4. FPGAD efender
5. CPAmap: On the Complexity of Secure FPGA Virtualization, Multi-Tenancy, and Physical Design
Cited by 2 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Power and Frequency Intrinsic Channels on gem5;IEEE Transactions on Circuits and Systems I: Regular Papers;2024
2. Towards Universal Metrics for Hardware Cybersecurity Assessment;2023 Eleventh International Conference on Intelligent Computing and Information Systems (ICICIS);2023-11-21
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